Özet:

Abstract Context. The relevance of the work consists in the development of computer-aided design methods for automatic real-time logic control devices by developing a single template in a synthesized subset of the hardware description language in the style of automatabased programming with implementation on the PLD hardware platform (FPGA, CPLD). Development of the description template for timed control finite state machines (FSM) in the hardware description language VHDL, automated synthesis and implementation of the model in PLD (FPGAs, CPLDs) using Xilinx ISE, subsequent analysis of the received circuit implementation for compliance with values of timing parameters of the circuit after implementation.

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