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Low Power Logic Gate cell design and its performance analysis
2022
Journal:  
Turkish Journal of Computer and Mathematics Education
Author:  
Abstract:

This paper describes the design of a 45nm CMOS technology logic gate library cells for highly energy-efficient applications of embedded processors. Design of OR and AND, circuits is present in this paper, to improve the speed and power. The comparative analysis of different performance parameters for CMOS logic gates is presented. Average power, Static Power and Delay are the parameters evaluated using Cadence tool. For a full-chip implementation of low-power systems operating at ultra-low voltage is feasible. The power and delay is extracted for logic cells at supply voltages 0.8 V, 1.0 V & 1.2 V at different frequencies

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2022
Journal:  
Turkish Journal of Computer and Mathematics Education
Author:  
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Turkish Journal of Computer and Mathematics Education

Journal Type :   Uluslararası

Metrics
Article : 1.706
Cite : 106
2023 Impact : 0.071
Details
Turkish Journal of Computer and Mathematics Education