Abstract:

The Secure Hash Algorithm is a cryptographically secure hash function that enables high security in electronic systems. SHA-256 refers to the output length of 256 bits. The folded SHA-256 algorithm is a one-way functional method that is used to represent data in a compact manner. It is utilized in a variety of authentication techniques including digital signal creation, password storage, computer vision and database access. SHA is a four step process involving pre-processing, message scheduling, digest calculation and digest update. In the partial product accumulation stage, the architecture of 4-2 adder compressor in    SHA-256 ensures an improvement in computing time by lowering the number of adders. Architectural folding is used for maximum resource sharing between the stages. The delay encountered for the entire system is 2.594 ns and power consumption is 177mW. The proposed design successfully attained the throughput efficiency by reducing the critical path delay.

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