Abstract:

Inverters are basically power electronics devices that are used to convert DC power to AC at a required frequency and voltage level. Their main application area in real-time is in high voltage and high-power applications in which the switching stress as well as total harmonic distortion must be low. Multilevel inverter technology has been emerging in recent times, as a very important substitute in for high-power medium-voltage energy governed devices. Multi-level inverters also have a major role in interconnected grid systems used nowadays. There are several major topologies of multilevel inverters that exist in literature: Diode clamped (DMLI) (aka neutral-point clamped), and Flying capacitor multilevel inverter (FCMLI) (aka capacitor-clamped) [1] and Cascaded H-bridges converter (CMLI) (i.e., cascaded multicell using separate dc sources). This paper discusses the principal benefits and drawbacks of increasing the number of levels of the inverter and how it has an effect on the efficiency and losses in the MLI architecture and how this difficulty as well as the overall performance of the systems can be improved using a novel Bridged-Cascaded H-bridge MLI topology. There are n-level inverter topologies possible. The paper proposes a novel bridged-insert cascaded MLI topology. The focus of the paper is on 5-level inverter topologies. The simulation has been carried out using MATLAB/Simulink.

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