Abstract:

In this study, the ferro-electric (Bi4Ti3O12) inter-permost metal-parallel (Au/n-Si) (MS) structures were prepared and their complex dielectra (e * = e '-j e '') and the electrical module (M*=M'+jM'') were detailed in a wide temperature range (80-320 K) at 1 MHz. The results of the experimental results showed that these parameters and electrical conductivity (s) were quite dependent on both temperature and voltage. Both the e'-V and e'-V graphics have reversal, exhaust and accumulation areas and the change in the e'ile e' values occurs especially in the exhaust and accumulation areas. This change was attributed to the presence of intermediate surface conditions/touchs (Dit) and temperature in the exhaust area, while the presence of serial resistance (Rs) and ferroelectric intermediate surface layer in the accumulation area. A special distribution of the inter-surface conditions placed on both e'-V and e'-V curves (Bi4Ti3O12)/n-Si inter-surface and on the prohibited energy band of the semiconductor and with temperature to the external dc electric area was attributed. The decrease of the values of e ', e ', M, M' and s at a decrease in temperature, the lack of sufficient free carrier at low temperatures and the increase in temperature was attributed to the increased number of loads passing from the dust to the transmission band.

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