Özet:

Two novel area and ultra low-energy efficient subthreshold logic families: Dynamic Threshold Gate Diffusion Input (DTGDI) and Swapped Body Bias Gate Diffusion Input (SBBGDI) are introduced. These logic families examine the effectiveness of GDI based circuits over the Conventional CMOS (C-CMOS) logic circuits using subthreshold optimal area overhead free body biasing schemes. The basic logic gates OR, AND and XOR are designed using the proposed DTGDI and SBBGDI logic. To analyze the performance, a full adder cell is implemented. The simulations are performed in Cadence 45nm technology with 0.2V supply voltage. The simulation results show that the proposed DTGDI full adder circuit with layout area of only 6.891µm2 offers more than 41% savings in energy ,78% savings in EDP than the Conventional CMOS (C-CMOS) and more than 12% energy savings, 27% savings in EDP than the GDI. Whereas, the SBBGDI full adder circuit with layout area of only 5.654 µm2 offers more than 47% savings in energy ,90% savings in EDP than the C-CMOS and more than 24% energy savings, 67% savings in EDP than the GDI.

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