Abstract:

Contemporary research in multilevel inverters (MLIs) is becoming famous for low power renewable applications. In this paper, therefore, a new configuration of SEPIC based single-phase seven-level inverter is presented with the advantages of lower parts count, size, and reduced cost. The front-end sepic inverter is used to boost the input voltage to the desired voltage and cascaded with a 1:2 multi-winding high-frequency transformer to generate Vdc and 2Vdc which is fed to the asymmetrical six switch multilevel inverter. The simulation work is carried out in Matlab/Simulink environment, and a laboratory prototype model is developed to validate the concept. The control pulses for the SEPIC inverter is built using TMS3202812 DSP in real time workshop(RTW), and the switching pulses for MLI are generated using a Spartan-6 FPGA Processor. The performance of the proposed topology evolved for the step change in input voltages, and the different loading conditions. A detailed comparison of various seven-level inverter topologies is also conducted.

Keywords: